Why use thick, wide traces?
Why use wide traces or planes for power and ground beyond carrying the DC current?
| Level | ● screening |
| Track | Power |
| Really testing | Inductance, not just resistance. |
Going deeper
Extra explanation that is not in the book: worked numbers, where people go wrong, and how to say it in the room.
Worked example — DC. 3 A through 2 inches of 20 mil trace in 1 oz copper: 2 in / 0.02 in = 100 squares × 0.5 mΩ = 50 mΩ. That's 0.15 V of drop and 0.45 W of heat in a trace — enough to matter on a 1.0 V rail.
Worked example — AC. The same 2 inches over a plane is about 16 nH (≈ 8 nH/in). A 10 A/µs load step makes 160 mV across it. A plane pair carrying the same current has a small fraction of a nH.
Plane capacitance. A power/ground pair 3 mil apart in FR4 gives about 300 pF per square inch, with almost no inductance — the best high-frequency decoupling on the board.
Where people go wrong
- Sizing only for temperature rise (IPC-2152) and forgetting the IR drop at low voltage.
- Necking a wide pour down to one via — the via, not the pour, sets the limit.
Errata
Correction: Trace inductance corrected: a 50 Ω trace over a plane is about 7–10 nH per inch. Fixed before the first printing. All errata
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